[1] It is required to construct a counter to count upto 100(decimal). The minimum number of flipflops required to construct the counter is
[3] For NOR circuit SR flip flop the not allowed condition is....
[4] A bistable multivibrator is a
[5] For a large values of |VDS|, a FET behave as
a) Voltage controlled resistor
b) Current controlled current source
c) Voltage controlled current source
d) Current controlled resistor
[6] When a step input is given to an op-amp integrator, the output will be
a) a ramp
b) a sinusoidal wave
c) a rectangular wave
d) a triangular wave with dc bias
[7] In a full-wave rectifier without filter, the ripple factor is
a) 0.482
b) 1.21
c) 1.79
d) 2.05
[8] Hysteresis is desirable in Schmitt-trigger, because
a) Energy is to be stored/discharged in parasitic capacitance
b) Effects of temperature would be compensated
c) Devices in the circuit should be allowed time for saturation and desaturation
d) It would prevent noise from causing false triggering
[9] For a 10-bit DAC, the Resolution is defined by which of the following
a) 1024
b) 1/1024
c) 10
d) None
[10] SRAM full form is
a) Serial Read Access Memory
b) Static Random Access Memory
c) Static Read-only Access memory
[11] What are the minimum number of 2 to 1 multiplexers required to generate a 2 input AND gate and a 2 input Ex-OR gate?
a) 1 and 2
b) 1 and 3
c) 1 and 1
d) 2 and 2
[12]The output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. Then gate is either
a) A NAND or an EX-OR gate
b) A NOR or an EX-NOR gate
c) An OR or a EX-NOR gate
d) An AND or an Ex-OR gate
[13] A PLA can be used
a) As a microprocessor
b) As a dynamic memory
c) To realise a sequential logic
d) To realise a combinational logic
[14] A dynamic RAM consists of
a) 6 Transistors
b) 2 Transistors and 2 Capacitors
c) 1 Transistor and 1 Capacitor
d) 2 Capacitor only
[15] When a CPU is interrupted, it
a) Stops execution of instructions
b) Acknowledges interrupt and branches of subroutine
c) Acknowledges interrupt and continues
d) Acknowledges interrupt and waits for the next instruction from the interrupting device.
a) 8
b) 7
c) 6
d) 5
[2] The gate that assumes the 1 state, if and only if the input does not take a 1 state is called........
a) AND gate
b) NOT gate
c) NOR gate
d) Both b and c
[3] For NOR circuit SR flip flop the not allowed condition is....
a) S=0, R=0
b) S=0, R=1
c) S=1, R=1
d) S=1, R=0
[4] A bistable multivibrator is a
a) Free running oscillator
b) Triggered oscillator
c) Saw tooth wave generator
d) Crystal oscillator
[5] For a large values of |VDS|, a FET behave as
a) Voltage controlled resistor
b) Current controlled current source
c) Voltage controlled current source
d) Current controlled resistor
[6] When a step input is given to an op-amp integrator, the output will be
a) a ramp
b) a sinusoidal wave
c) a rectangular wave
d) a triangular wave with dc bias
[7] In a full-wave rectifier without filter, the ripple factor is
a) 0.482
b) 1.21
c) 1.79
d) 2.05
[8] Hysteresis is desirable in Schmitt-trigger, because
a) Energy is to be stored/discharged in parasitic capacitance
b) Effects of temperature would be compensated
c) Devices in the circuit should be allowed time for saturation and desaturation
d) It would prevent noise from causing false triggering
[9] For a 10-bit DAC, the Resolution is defined by which of the following
a) 1024
b) 1/1024
c) 10
d) None
[10] SRAM full form is
a) Serial Read Access Memory
b) Static Random Access Memory
c) Static Read-only Access memory
[11] What are the minimum number of 2 to 1 multiplexers required to generate a 2 input AND gate and a 2 input Ex-OR gate?
a) 1 and 2
b) 1 and 3
c) 1 and 1
d) 2 and 2
[12]The output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. Then gate is either
a) A NAND or an EX-OR gate
b) A NOR or an EX-NOR gate
c) An OR or a EX-NOR gate
d) An AND or an Ex-OR gate
[13] A PLA can be used
a) As a microprocessor
b) As a dynamic memory
c) To realise a sequential logic
d) To realise a combinational logic
[14] A dynamic RAM consists of
a) 6 Transistors
b) 2 Transistors and 2 Capacitors
c) 1 Transistor and 1 Capacitor
d) 2 Capacitor only
[15] When a CPU is interrupted, it
a) Stops execution of instructions
b) Acknowledges interrupt and branches of subroutine
c) Acknowledges interrupt and continues
d) Acknowledges interrupt and waits for the next instruction from the interrupting device.
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